DTCO Device Lab, PKU

The Power of Nature is Unbelievable

prof_pic3.jpg

Heng Wu,

Associate Professor

School of Integrated Circuits

Peking University

hengwu at pku.edu.cn

Heng Wu, Associate professor at the School of Integrated Circuits of Peking University from 2023.

Experiences: Research Staff Member at IBM T. J. Watson Research Center in New York State, USA from 2016 to 2022, working towards Next-gen Logic Development. Prior to this, I received the Ph.D. degree in Electrical and Computer Engineering from Purdue University under Professor P.D. Ye in 2016, with a thesis on Beyond Si CMOS.

Research: My research focuses on Design Technology Co-optimization (DTCO), 3D Integration, VLSI Device&Design and Semiconductor Devices&Physics. I have published more than 80 papers/book chapters and filed more than 500 US/China/EU patents.

Recognitions: Recipient of Best Paper Awards of several renowned conferences such as VLSI2024, DRC2015, TECHON2015 and SISC2013. I also received the IEEE Paul Rappaport Award and was appointed as “IBM Master Inventor”.

Openings: The group has openings for potential graduate students and post-doc researchers. If you are interested in pioneering/contributing in advancement of IC technology, This is the place.

Expectation for Potential Students: Problem-solving,Team-working and Enthusiasm. You are strongly encouraged to read two textbooks: < Fundamentals of Modern VLSI Devices> by Tak H. Ning & Yuan Taur and < Digital Integrated Circuits, A Design Perspective> by Jan. Rabaey.

THINK, THINK DIFFERENT and HARD WORKING.


If you want to be successful, attitude is everything. We have all the knowledge you need and you ought to be ready to have the attitude to do something with it.
Robert H. Dennard

news

selected publications

  1. VLSI
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    First Demonstration of Symmetric Dual-sided Vertical FET (DSVFET) for Energy Efficient Computing (EEC): From Processes and Devices to Circuits
    Y Liu, Y Chu, Y Wang, Z Xu, J Zhang, F Sun, H Lu, Z Wang, L Li, L Zhang, J Wu, Y Wu, S Liu, X He, T Liu, M Xu, P Ren, Z Ji, X Wu, L Zhang, W Bu, J Kang, J Zhang, M Li, R Wang, H Wu*, and R Huang
    In 2025 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) , 2025
  2. VLSI
    FFET_Demo.jpg
    First Experimental Demonstration of Dual-sided N/P FETs in Filp FET (FFET) on 300 mm Wafers for Stacked Transistor Technology in Sub-1nm Nodes
    Heng Wu*, Weihai Bu, Yandong Ge, Yanbang Chu, Jiacheng Sun, Jianxiang Jin, Yongqin Wu, Ye Ren, Falong Zhou, Lijie Zhang, Jack Wu, Ming Li, Jin Kang, Runsheng Wang, Xin Zhang, and Ru Huang
    In 2025 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) , 2025
  3. IEDM
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    A 14 nm embedded stt-mram cmos technology
    D Edelstein*, M Rizzolo, D Sil, A Dutta, J DeBrosse, M Wordeman, A Arceo, IC Chu, J Demarest, Eric RJ Edwards, and others
    In 2020 IEEE International Electron Devices Meeting (IEDM), 2020